Many digital cameras and digital video camcorders are commercially available. Some of these cameras and camcorders comprise encoding and decoding processing means for a plurality of coding schemes like a digital camera that can capture and record a moving image by switching photographic modes, or a digital video camcorder that can shoot and record a still image by switching photographic modes. In general, different coding schemes have different encoded data stream syntaxes. Also, encoded data streams processed by many coding schemes are formed by a mixture of both variable- and fixed-length codes.
Information contained in an encoded data stream is roughly categorized into two kinds of information. One type of information is so-called header information represented by common encoding parameters for the whole video sequence or different encoding parameters for respective pictures. The other type of information is image information itself. The header information may be partially formed by a variable-length code word, but is basically formed by a series of a plurality of fixed-length codes. On the other hand, the image information is a principal element that forms an encoded data stream, and is mainly formed by a series of a plurality of variable-length codes in consideration of high encoding efficiency.
In order to process (encode or decode) such general encoded data stream that includes both fixed- and variable-length codes at high speed, an encoding or decoding processing apparatus is known that independently comprises a processor that exclusively processes header information and a processor that exclusively processes image information, and operates these two processors in tandem with each other.
When a decoding process, for example, is done by such apparatus, the header information processor is always active (also, a program is running) even during a period in which a variable-length code decoder decodes a series of orthogonal transformation coefficient sequences so as to advance processing anywise, thereby shortening the time required for the overall decoding process compared to a case wherein the header information processor stands by in an inactive state. Note that orthogonal transformation means conversion between spatial domain and frequency domain. The same applies throughout the following description.
However, in general, there are not so many processes that the simultaneously operating header information processor should or must advance during the period in which the variable-length code decoder decodes a series of orthogonal transformation coefficient sequences as a processing unit.
An arithmetic operation required for a motion vector reconstruction process as a typical process of the header information processor can be done by a very small number of execution steps, and the header information processor, which has completed a series of processes instructed in advance by a program, normally repeats an idle routine in which it waits for only an interrupt by an end message signal of the decoding process from the variable-length code decoder.
Of course, when the current processing unit to be decoded is located at a hierarchically special position of a syntax like at a boundary of slice layers, or when various compensation operations for code errors detected in an encoded data stream are executed, relatively heavy processes are required for the header information processor. Electric power that the header information processor, which repeats the idle routine, consumes in the interrupt input wait state, is not negligible, if a system which comprises that decoding processing apparatus places an importance on portability.
In general, an interrupt service process of the header information processor requires a predetermined number of execution steps when the processor enters the interrupt service routine and returns to the previous routine, respectively. In a system such as an image encoding or decoding processing apparatus in which the number of times of interrupt events per unit time is relatively large, the total overhead upon executing the interrupt service process is not negligible, neither.
The header information processor uses a randomly accessible memory as a work area to save register values upon calling functions in a program, and to store constants to be used frequently and variables to be used temporarily. On the other hand, a variable-length code encoding or decoding processor executes a variable-length encoding or decoding process by looking up a variable-length code table stored in a memory. In this case, the memory that stores the variable-length code table, and that which is used as a work area of the header information processor are independent memories, and the whole system requires a total of memory sizes required for these memories, resulting in poor memory use efficiency.
Since the variable-length code table generated by the header information processor is written in a memory of the variable-length encoder or decoder via a bus or the like that connects them, a plurality of cycles are required to write data corresponding to one code. For example, since a Huffman code table for AC coefficients for one image component specified by the JPEG encoding recommendation has as many as 162 elements, the total number of cycles required to write these elements in the memory while consuming a plurality of cycles per element is not negligible.